July 31 / 2 August, 2023 – Hybrid Event
Computing hardware has become an attractive attack surface, either due to unintentional design flaws or malicious design modifications. Hardware designers and automation tool developers alike are challenged to understand the different hardware security threats in order to incorporate effective countermeasures into robust hardware design, verification, and testing. The most common targets in such adversary attacks are secure architectures, cryptographic primitives, and intellectual property (IP) by counterfeiting. Moreover, as more Internet of Things (IoT) applications are emerging, vulnerabilities to cyberattacks are created as well, with new hardware-based defense mechanisms for smart systems and devices being in need. With well-known hardware security threats such as Hardware Trojans (HT), Reverse Engineering (RE), and covert and side channels continuously advancing, novel attacks targeting remote, cross-layer liabilities also become prevalent.
At the same time, hardware solutions have proven to be highly efficient when it comes to security assurance. Two such security primitives are True Random Number Generators (TRNGs) and Physical Unclonable Functions (PUFs), which offer protection against spoofing and tampering attacks. Lightweight cryptographic modules are especially useful as an increasing number of devices in the IoT with resource constraints require strong security and mutual authentication schemes. Hardware implementation of cryptographic primitives can offer flexibility, power efficiency, and the ability of parallel processing. Since the physical layer often acts as the base of trust in a system, a promising research direction towards state-of-the-art hardware security solutions is being formed.
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Prospective authors are encouraged to submit previously unpublished contributions from a broad range of topics, which include but are not limited to the following:
› Related areas, in alphabetical order, include but are not limited to:
• Architectures and Applications: 5G/6G, Healthcare, IoT etc
• Attacks: Implementations and Countermeasures
• Constrained and Trusted Environments
• Cryptanalysis for Hardware
• Cryptographic Primitives and Lightweight Cryptography
• Hardware Crypto-Processors, System-on-Chip (SoC) and Reconfigurable Designs
• Hardware Obfuscation
• Networks, Protocols and Communications: Hardware Integrations
• PUFs, Trojans and TRNGs on Hardware
• Reverse Engineering
• Smart Cards Cybersecurity
• Trust and Anti-Counterfeiting;
Paper submission deadline: March 15 April 20, 2023 AoE
Authors’ notification: April 1 April 25, 2023 AoE
Camera-ready submission: April 15 May 3, 2023 AoE
Early registration deadline: May 5, 2023 AoE
Workshop date: July 31 – August 2 2023
The workshop’s proceedings will be published by IEEE and will be included in IEEE Xplore. The guidelines for authors, manuscript preparation guidelines, and policies of the IEEE CSR conference are applicable to HACS 2023 workshop. Please visit the authors’ instructions page for more details. When submitting your manuscript via the conference management system, please make sure that the workshop’s track 2T1 HACS is selected in the Topic Areas drop down list.
Workshop chairs
Nicolas Sklavos, University of Patras (GR)
Organising Committee
Paris Kitsos, University of Peloponnese (GR)
Odysseas Koufopavlou, University of Patras (GR)
Valeria Loscri, Inria Lille – Nord Europe (FR)
Ivana Ognjanovic, University of Donja Gorica (ME)
Nicolas Sklavos, University of Patras (GR)
Sherali Zeadally, University of Kentucky (USA)
Publicity chair
Paris Kitsos, University of Peloponnese (GR)
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Program committee
Soumyajit Dey, IIT Kharagpur (IN)
Zoya Dyka, IHP – Leibniz-Institut für innovative Mikroelektronik (DE)
Basel Halak, University of Southampton (UK)
Ievgen Kabin, IHP – Leibniz-Institut für innovative Mikroelektronik (DE)
Cetin Kaya Koc, UCSB (US), NUAA (China) & Igdir University (TR)
Ulrich Kühne, Telecom Paris (FR)
Peter Langendörfer, HP & BTU Cottbus-Senftenberg (DE)
Francesco Leporati, University of Pavia (IT)
Nikolay A. Moldovyan, St. Petersburg Federal Research Center of the Russian Academy of Sciences (SPC RAS) (RU)
Maria Mushtaq, Telecom Paris (FR)
Giorgio Di Natale, TIMA – CNRS (FR)
Josef Pieprzyk, CSIRO Data61 (AS)
Francesco Regazzoni, University of Amsterdam /Università della Svizzera italiana (NL/IT)
Vincent Rijmen, KU Leuven, Belgium and University of Bergen (NO)
Georgios Selimis, Axelera AI (NL)
Stavros Shiaeles, University of Portsmouth (UK)
Leonel Sousa, INESC-ID, IST, Universidade de Lisboa (PT)
Sara Tehranipoor, West Virginia University (USA)