2025 IEEE CSR Workshop on Hardware Cybersecurity Systems (HACS)

 Call for Papers

Resilience of the Internet of Things, industrial control systems, critical infrastructures and health care etc. is of utmost importance. The basis to achieve this are trustworthy embedded devices. In order to ensure trustworthiness of these devices their whole life cycle needs to be taken into account. This means their design, production, deployment and use. Here considering hardware and embedded software such as operating systems and firmware. Computing hardware has become an attractive attack surface, either due to unintentional design flaws or malicious design modifications. Hardware designers and automation tool developers alike are challenged to understand the different hardware security threats in order to incorporate effective countermeasures into robust hardware design, verification, and testing. This holds true not only for security-related hardware components but also for general-purpose processors. The most common targets in such adversary attacks are secure architectures, cryptographic primitives, and intellectual property (IP) by counterfeiting. Well-known hardware security threats are e.g. Hardware Trojans (HT), Reverse Engineering (RE), covert and side channels. In addition continuously advancing, novel attacks targeting remote, cross-layer liabilities also become prevalent. In order to ensure trustworthiness of embedded systems also the embedded GPUs need to support secure processing by e.g. providing means to ensure control flow integrity. In addition, operating systems and firmware need to be hardened to reduce vulnerabilities related to known attack types such as buffer overflows and return-oriented-programming, return-to-libc etc. But also AI based attack detection means, implemented in hard- or software, are required to detect novel, innovative attacks during the normal operation of the devices.

The CSR HACS workshop will accept high-quality research papers presenting strong theoretical contributions, applied research and innovation results obtained from funded cyber-security and resilience projects, and industrial papers that promote contributions on technology development and contemporary implementations.

Topics of Interest

Prospective authors are encouraged to submit previously unpublished contributions from a broad range of topics, which include but are not limited to the following:

› Architectures and applications: 5G/6G, healthcare, IoT, etc.
› Networks, protocols and communications: hardware integrations
› Attacks: implementations and countermeasures
› Constrained and trusted environments
› Cryptanalysis/Side channel attacks for hardware
› Cryptographic primitives and lightweight cryptography

› Hardware obfuscation
› Hardware crypto-processors, system-on-chip (SoC) and reconfigurable designs
› Trust and anti-counterfeiting
› Reverse engineering, Hardware Trojans detection and countermeasures
› Attack detection: Control flow integrity, AI based attack detection etc.
› Software life cycle integrity
› Secure, trustworthy operating systems and firmware

Important Dates

Paper submission deadline: April 14, 2025
Authors’ notification: May 5, 2025
Camera-ready submission: May 26, 2025
Registration deadline (authors): May 26, 2025
Workshop dates: August 4–6, 2025

Submission Guidelines

Submitted manuscripts should not exceed 6 pages (plus 2 extra pages, being subject to overlength page charges) and should be of sufficient detail to be evaluated by expert reviewers in the field. The workshop’s proceedings will be published by IEEE and will be included in IEEE Xplore subject to meeting IEEE Xplore’s scope and quality requirements.

The guidelines for authors, manuscript preparation guidelines, and policies of the IEEE CSR conference are applicable to HACS workshop. Please visit the authors’ instructions page for more details. When submitting your manuscript via the conference management system, please make sure that the workshop’s track 2T9 HACS is selected in the Topic Areas drop down list.

Workshop Committees

Workshop Chairs

Contact Us

peter.langendoerfer@b-tu.de

Technical Program Committee

Giovanni Agosta, Politecnico di Milano (IT)
Ricardo Chaves, INESC-ID, IST, ULisboa (PT)
Pascal Cotret, Lab-STICC (FR)
Soumyajit Dey, IT Kharagpur (IN)
Giorgio Di Natale, TIMA – CNRS (FR)
Zoya Dyka, Leibniz-Institut für innovative Mikroelektronik (DE)
Aurelien Francillion, Eurecom (FR)
Basel Halak, University of Southampton (UK)
Ivgen Kabin, Leibniz-Institut für innovative Mikroelektronik (DE)
Elif Bilge Kavun, University of Passau (DE)
Paris Kitsos, University of the Peloponnese (GR)
Dominik Klein, German Federal Office for Information Security – BSI (DE)
Nicholas Kolokotronis, University of the Peloponnese (GR)
Ulrich Kühne, Télécom Paris (FR)
Marco Macchetti, Qualcomm Technologies (CH)
Yiorgos Makris, University of Texas at Dallas (US)
Vincent Mooney, Georgia Institute of Technology (US)
Maria Mushtaq, Telecom Paris (FR)
Francesco Regazzoni, Università della Svizzera italiana (CH)
Vincent Rijmen, KU Leuven (BE)
Ioannis Savidis, Drexel University (US)
Georgios Selimis, Axelera AI BV (NL)
Anirban Sengupta, Indian Institute of Technology Indore (IN)
Dimitrios Serpanos, University of Patras (GR)
Stavros Shiaeles, University of Portsmouth (UK)
Leonel Sousa, Universidade de Lisboa (PT)
Sara Tehranipoor, West Virginia University (US)
Guzin Ulutas, Karadeniz Technical University (TR)
Sherali Zeadally, University of Kentucky (US)
Mark Zwolinski, University of Southhampton (UK)

Publicity Chairs

Peter Langendoerfer, IHP GmbH Leibniz Institute for High Performance Microelectronics & BTU Cottbus-Senftenberg (DE)

Program Information